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Êè§à»ç¹µÑÇÍÑ¡Éà ËÃ×Íà»ç¹ªØ´µÑÇÍÑ¡Éà à¢éҶ֧Ẻ
Sequentially
ËÃ×Í Randomly Êè§¢éÍÁÙÅẺ Synchronously ËÃ×Í Asynchronously ºÒ§ÍØ»¡Ã³ì Dedicated ËÃ×Í Shared ºÒ§ÍØ»¡Ã³ì Read-only ËÃ×Í Read-write áÅÐ·Ø¡ÍØ»¡Ã³ì¤ÇÒÁàÃçÇÊÙ§µèÓµèÒ§¡Ñ¹ 1. ÍØ»¡Ã³ìª¹Ô´¢éÍÁÙÅà»ç¹ÊÒÂ
(stream) ÍØ»¡Ã³ì»ÃÐàÀ·¹Õé¢éÍÁÙÅ·ÕèÊè§à¢éÒÍÍ¡¨ÐàÃÕ§ÁÒà»ç¹ÅӴѺ¡è͹-ËÅѧ ¡ÒÃáºè§á¡¢éÍÁÙÅ·Óä´éâ´ÂµÃǨÊͺÅӴѺ¢Í§¢éÍÁÙÅ ÍØ»¡Ã³ì»ÃÐàÀ·¹ÕéÊÒÁÒö¨Ñ´¡ÒÃä´é§èÒ à¾Õ§áµè¨Ñ´¡ÒÃÃѺ-Êè§¢éÍÁÙÅãËé¶Ù¡µéͧ¡çà¾Õ§¾ÍáÅéÇ µÑÇÍÂèÒ§¢Í§ÍØ»¡Ã³ìª¹Ô´¹Õéä´éá¡è
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à¤Ã×èͧ¾ÔÁ¾ì·Õè¨Ñ´ÍÂÙèã¹ÍØ»¡Ã³ì»ÃÐàÀ·¹Õé ¢éÍÁÙÅ·Õè¶Ù¡Êè§Í͡仡è͹¡ç¨Ð¶Ù¡¾ÔÁ¾ì¡è͹
¢éÍÁÙÅ·Õè¶Ù¡Êè§ä»·ÕËÅѧ¨Ð¶Ù¡¾ÔÁ¾ì·ÕËÅѧ 2. ÍØ»¡Ã³ìª¹Ô´¢éÍÁÙÅäÁèà»ç¹ÊÒÂ
(non-stream)
ÍØ»¡Ã³ì»ÃÐàÀ·¹Õé ¢éÍÁÙÅ·ÕèÊè§áÅÐÃѺäÁè¢Öé¹ÍÂÙè¡ÑºÅӴѺ¡ÒÃÊè§ àÃÒµéͧÍÒÈÑ¢éÍÁÙÅà¾ÔèÁàµÔÁà¾×èÍ·Õè¨Ðá¡áÂТéÍÁÙÅáµèÅеÑÇ ¡ÒèѴ¡ÒÃÍØ»¡Ã³ì»ÃÐàÀ·¹Õé
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¨ÐµéͧÊè§ä»ã¹µÓá˹觷Õè¶Ù¡µéͧ µÓá˹觢ͧµÑÇÍÑ¡É÷ÕèáÊ´§ÍÂÙ躹¨ÍÀÒ¾áµèÅеÑǨÐÁÕáÍ´à´ÃÊ»ÃШӵÓá˹觹Ñ鹿 àÁ×èÍàÃÒÊè§µÑÇÍÑ¡ÉÃä»ÂѧáÍ´à´ÃÊã´µÑÇÍÑ¡Éáç¨Ð»ÃÒ¡®ÍÂÙ躹¨ÍÀÒ¾ ³ µÓá˹è§áÍ´à´ÃʹÑ鹿
´Ñ§¹Ñé¹ ¨ÐàËç¹ä´éÇèÒ ¡ÒÃÊè§µÑÇÍÑ¡ÉÃä»ãËé¨ÍÀÒ¾äÁè¨Óà»ç¹µéͧÅӴѺ¡ÒÃÊè§·Õè¶Ù¡µéͧ áµèµéͧ¡ÒÃáÍ´à´ÃÊ·ÕèµÃ§¡ÑºµÓá˹è§à·èÒ¹Ñé¹ ÍØ»¡Ã³ìÍÔ¹¾Øµ (Input device) ¤×Í ÍØ»¡Ã³ì·Õè·ÓãËé¤ÍÁ¾ÔÇàµÍÃìÊÒÁÒöÊÑÁ¼ÑÊáÅÐÃѺÃÙéÊÔè§µèÒ§
æ ¨Ò¡âÅ¡ ÀÒ¹͡ä´é µÑÇÍÂèÒ§àªè¹
à¤Ã×èͧÍèÒ¹ºÑµÃ ¤ÕÂìºÍÃì´ àÁÒÊì ÍØ»¡Ã³ìàÍÒµì¾Øµ (Output device) ¤×Í ÍØ»¡Ã³ì·Õè·ÓãËé¤ÍÁ¾ÔÇàµÍÃì¤ÍÁ¾ÔÇàµÍÃì¤Çº¤ØÁËÃ×ÍÊè§¼ÅÍÍ¡ÁÒÊÙèâÅ¡ÀÒ¹͡ä´é µÑÇÍÂèÒ§àªè¹ à¤Ã×èͧà¨Òкѵà ¨ÍÀÒ¾
à¤Ã×èͧ¾ÔÁ¾ì
(1) A communications technique that determines
when a terminal is ready to send data. The computer continually interrogates
its connected terminals in a round robin sequence. If a terminal has data to
send, it sends back an acknowledgment and the transmission begins. Contrast
with an interrupt-driven system, in which the terminal generates a signal
when it has data to send. (2) A technique that continually interrogates a
peripheral device to see if it has data to transfer. For example, if a mouse
button was pressed or if data is available at a communications port. Contrast
with event-driven or interrupt-driven techniques, in which the operating
system generates a signal and interrupts the system. (Techweb.com) ÃÐàºÕºÇÔ¸Õ¡Ò÷ÕèÊÁºÙóì
㹡ÒÃàª×èÍÁµèÍÃÐËÇèÒ§ host
áÅÐ µÑǤǺ¤ØÁ ÁÕ¡ÒÃ·Ó handshaking à»ç¹¾×é¹°Ò¹ â´ÂÊÁÁµÔãËéÁÕ 2 bits àª×èÍÁ»ÃÐÊÒ¹ producer áÅÐ consumer ËÃ×Í controller
áÅÐ host â´ÂÁÕ¡Òú觺͡ʶҹТ³Ð·Ó§Ò¹ ¡ÒâѴ¨Ñ§ËÇШзӧҹÍÂèÒ§µèÍà¹×èͧÃèÇÁ¡Ñº
CPU ¨Ö§¶Ù¡àÃÕ¡ÇèÒ Interrupt-request line â´Â·Ó§Ò¹à»ç¹ Interrupt-driven I/O
cycle ÊÓËÃѺ 7 ͧ¤ì»ÃСͺ 1. device driver initialtes
I/O 2. initiates I/O 3. input ready, output complete, or error
generates interrupt signal 4. CPU receiving interrupt, transfers control to
interrupt handler 5. interrupt handler processes data, returns
from interrupt 6. CPU resumes processing of interrupted task 7. CPU executing checks for interrupts between
instructions [img]interruptcycle.png[/img] 7.1.3
à¢éҶ֧˹èǤÇÒÁ¨Óâ´ÂµÃ§
(Direct
memory access)
(Direct Memory Access) Specialized circuitry or
a dedicated microprocessor that transfers data from memory to memory without
using the CPU. Although DMA may periodically steal cycles from the CPU, data
are transferred much faster than using the CPU for every byte of transfer. On
PCs, there are eight DMA channels commonly used as follows. Most sound cards
are set to use DMA channel 1 DMA ¤×Í
ǧ¨Ã¾ÔàÈÉ·ÕèÍ͡ẺÁÒà¾×èÍÊè§¢éÍÁÙÅÃÐËÇèÒ§ ˹èǤÇÒÁ¨Ó ¶Ö§Ë¹èǤÇÒÁ¨Óâ´ÂäÁèãªé¡Ò÷ӧҹ¢Í§ CPU áÅÐà»ç¹¡Ò÷ӧҹ·Õè¤Ò´ËÇѧ ËÃ×Í·Ó¹Ò¢éÍÁÙÅÅèǧ˹éÒ ã¹¡ÒÃàÃÕ¡¢éÍÁÙÅ·Õèµéͧ¡ÒÃãªé
á·¹·Õè¨ÐãËé CPU
à»ç¹¤¹ÊÑè§§Ò¹ãËéàÃÕ¡¢éÍÁÙÅâ´ÂµÃ§ ÀÒ¾áÊ´§¢Ñ鹵͹¡Ò÷ӧҹÃèÇÁ¡Ñ¹¢Í§
CPU, Cache,
CPU memory bus, DMA, PCI bus, IDE disk controller áÅÐ Disk
ÁÕ¢Ñ鹵͹µèÒ§ æ 6 ¢Ñ鹵͹ 1. device driver is told to transfer disk data
to buffer at address X 2. device driver tells disk controller to
transfer C bytes from disk to buffer at address X 3. disk controller initiates DMA transfer 4. disk controlelr
sends each byte to DMA controller 5. DMA controller transfers bytes to buffer X,
increasing memory address and decreasing c until c = 0 6. when c = 0, DMA interrupts CPU to signal
transfer completetion [img]http://www.infocom.cqu.edu.au/Units/win2000/85349/Resources/Lectures/pics/12_7.gif[/img] ¤ÇÒÁàÃçÇ¢Í§ÍØ»¡Ã³ìµèÒ§ æ
7.2.1 Block and character devices â´Â»¡µÔÃкº»¯ÔºÑµÔ¡ÒèФҴËÇѧ¡ÒÃàª×èÍÁµèͼèÒ¹
read()
write() ËÃ×Í seek() «Öè§à»ç¹ÍØ»¡Ã³ìÊè§¢éÍÁÙÅẺ simple linear array of
block ËÃ×Í raw I/O µÑÇÍÂèÒ§ÍØ»¡Ã³ìẺ¹Õé·ÕèàËç¹ä´éªÑ´·ÕèÊØ´¡ç¤×Í keyboard 7.2.2 Network devices ã¹Ãкºà¤Ã×Í¢èÒ¨ÐÁÕ¡ÒõԴµèÍÊ×èÍÊÒáѹ¼èÒ¹
socket
interface ¹Í¡¨Ò¡¡ÒõԴµèÍẺ read() write() áÅÐ seek() ÂѧÁÕ¡ÒÃãªéÍØ»¡Ã³ìã¹à¤Ã×Í¢èÒÂàª×èÍÁµèÍà¢éÒÁÒ¼èÒ¹ socket ä´éÍÕ¡·Ò§Ë¹Öè§ â´ÂäÁèä´é¤Ó¹Ö§¶Ö§Ãкº»¯ÔºÑµÔ¡ÒÃÇèÒ¨Ðà»ç¹ UNIX ËÃ×Í Windows áµèʹã¨à©¾ÒÐÊÔè§·ÕèÊè§à¢éÒÁÒÇèÒà¢éÒÁÒ·Ò§ã´ 7.2.3 Clocks and timers ¤ÍÁ¾ÔÇàµÍÃìÊèǹãËèÁÕ
hardware
clock áÅÐ timer ãËé¢éÍÁÙž×é¹°Ò¹à¡ÕèÂǡѺàÇÅÒ 3 ÍÂèÒ§ - ºÍ¡àÇÅһѨ¨ØºÑ¹
(Current
time) - ºÍ¡àÇÅÒ·Õè¼èÒ¹ä»
(Elapsed
time) - µÑé§
trigger ·Õè¨Ð»¯ÔºÑµÔ¡ÒõèÍàÇÅÒ 7.2.4 Blocking and nonblocking
I/O ¡ÒÃÁÕ
system-call
interface ÃͧÃѺ I/O ·ÕèÁÒ¨Ò¡ blocking áÅÐ
nonblocking à¾ÃÒмÙéãªéÍÒ¨ãªé·Ñé§ mouse áÅÐ
keyboard Êè§¢éÍÁÙžÃéÍÁ¡Ñ¹ ã¹¢³Ð·Õè¡ÓÅѧà»Ô´ÀҾ¹µì¨Ò¡á¼è¹ CD ¨Ö§µéͧÃͺÃѺ¢éÍÁÙŵèÒ§ æ ·Õèà¢éÒÁÒ
Kernel ¤×Íá¡è¹¢Í§Ãкº
·ÕèãËéºÃÔ¡ÒõèÒ§ æ ÁÒ¡ÁÒ áÅÐÊÑÁ¾Ñ¹¸ì¡Ñº I/O ´éÒ¹µèÒ§ æ ËÃ×Í¡ÅèÒÇä´éÇèÒ·Ñé§ 6 àÃ×èͧµèÍ仹Õé ¤×ÍÃкºÂèÍ¢ͧ¡ÒèѴ¡ÒÃÀÒÂã¹ kernel ·Õèà¡ÕèÂǡѺ I/O 7.3.1 I/O scheduling [img]http://www.humblepie.com/graphics/diskcacheread1.jpg[/img] - ½Ö¡µÔ´µÑé§ÍØ»¡Ã³ìãËÁèà¾ÔèÁà¢éÒä» - ½Ö¡µÃǨÊͺ¤ÇÒÁàÃçÇ¢Í§ÍØ»¡Ã³ì
input áÅÐ output µèÒ§ æ
¤ÍÁ¾ÔÇàµÍÃì 1. á»é¹¾ÔÁ¾ì (Keyboard) à»ç¹ÍØ»¡Ã³ì¹Óà¢éÒ·ÕèÊÒÁÒö»é͹¢éÍÁÙÅà¢éÒâ´Â¡ÒþÔÁ¾ì
ÍØ»¡Ã³ì input áÅÐ output
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